K. Sridharan

Indian Institute of Technology Madras, Nanyang Technological University, Indian Institute of Technology Guwahati, Indian Institute of Technology Indore, Rensselaer Polytechnic Institute

Papers

35

Total Citations

972

H-Index

13

About

No biography available yet.

Research Focus

Computer science34 · 966 citations
Mathematics19 · 822 citations
Field-programmable gate array20 · 808 citations
Computer hardware17 · 763 citations
Algorithm16 · 739 citations
Theoretical computer science8 · 648 citations
CORDIC5 · 636 citations
Arithmetic2 · 577 citations
QR decomposition1 · 574 citations
Eigenvalues and eigenvectors1 · 574 citations
Singular value decomposition1 · 574 citations
Trigonometry1 · 574 citations

Key Achievements

13
H-Index
35
Papers
972
Total Citations
28
Avg Citations/Paper
🏆 Most Cited Paper
50 Years of CORDIC: Algorithms, Architectures, and Applications
574 citations · 2009
📈 Most Prolific Year: 2009 (3 Papers)
🤝 Key Collaborators: 30
🏛 Institutions: Indian Institute of Technology Madras, Nanyang Technological University, Indian Institute of Technology Guwahati, Indian Institute of Technology Indore, Rensselaer Polytechnic Institute

Top Papers

  1. 1
    50 Years of CORDIC: Algorithms, Architectures, and Applications
    574 citations · 2009
  2. 2
    Efficient FPGA Realization of CORDIC With Application to Robotic Exploration
    42 citations · 2009
  3. 3
    Mobile Robot Navigation Through a Hardware-Efficient Implementation for Control-Law-Based Construction of Generalized Voronoi Diagram
    38 citations · 2010
  4. 4
    Real-Time SURF-Based Video Stabilization System for an FPGA-Driven Mobile Robot
    36 citations · 2016
  5. 5
    The Design of a Hardware Accelerator for Real-Time Complete Visibility Graph Construction and Efficient FPGA Implementation
    27 citations · 2005
  6. 6
    CORDIC-Based Azimuth Calculation and Obstacle Tracing via Optimal Sensor Placement on a Mobile Robot
    22 citations · 2015
  7. 7
    Hardware-Efficient Prediction-Correction-Based Generalized-Voronoi-Diagram Construction and FPGA Implementation
    21 citations · 2008
  8. 8
    Measures of intensity of collision between convex objects and their efficient computation
    18 citations · 1991
  9. 9
    A hardware-efficient scheme and FPGA realization for computation of single pair shortest path for a mobile automaton
    17 citations · 2006
  10. 10
    A parallel algorithm to construct Voronoi diagram and its VLSI architecture
    15 citations · 2003

Key Collaborators

LVLeena Vachhani9 shared papersTPT.K. Priya5 shared papersNSN. Sudha3 shared papersBGBoby George3 shared papersPKPankaj Kumar3 shared papersPVPranjal Vyas3 shared papersDKDebasrita Kar3 shared papersHSH.E. Stephanou2 shared papersYPYashrajsinh Parmar2 shared papersPKPramod Kumar Meher2 shared papersVSV. Sudharsan1 shared papersPVPuduru Viswanadha Reddy1 shared papersPTPriya T.K.1 shared papersPRPanakala Rajesh Kumar1 shared papersADArun D. Mahindrakar1 shared papersRSR. Sarathi1 shared papersSNSukumar Nandi1 shared papersPNP. Nagachandrika1 shared papersTSTahiyah Shene1 shared papersSKSharad Kumar Singh1 shared papers
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