Ken Matsubara

Renesas Electronics (Japan)

Papers

1

Total Citations

3

H-Index

1

About

Ken Matsubara is a leading figure in embedded non-volatile memory (NVM) design, with a focus on advancing high-performance, high-density flash memory for next-generation microcontrollers (MCUs). His key research areas include SG-MONOS (Split-Gate Metal-Oxide-Nitride-Oxide-Silicon) flash technology, high-speed read path circuits, and low-power, high-density memory architectures. Matsubara’s major contribution is the development of a 40nm embedded SG-MONOS flash macro that achieves a remarkable 200 MHz random read operation and a density of 7.91 Mb/mm². This breakthrough was enabled by his team’s innovative charge-assisted offset cancellation sense amplifier, which overcomes speed and reliability challenges in scaled nodes. His work directly supports the performance demands of endpoint devices in AI, IoT, and 5G applications—enabling smarter factories and home automation. With over 3 citations for this flagship paper, Matsubara’s research is pivotal for high-end MCUs requiring both speed and density. His achievements underscore a deep expertise in memory circuit design and a clear impact on the semiconductor industry’s push toward more intelligent, connected systems.

Research Focus

Key Achievements

1
H-Index
1
Papers
3
Total Citations
3
Avg Citations/Paper
🏆 Most Cited Paper
A 40nm Embedded SG-MONOS Flash Macro for High-end MCU Achieving 200MHz Random Read Operation and 7.91Mb/mm2 Density with Charge Assisted Offset Cancellation Sense Amplifier
3 citations · 2021
📈 Most Prolific Year: 2021 (1 Papers)
🤝 Key Collaborators: 14
🏛 Institutions: Renesas Electronics (Japan)

Top Papers

  1. 1

Key Collaborators

Contact & Links

Available for collaboration
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