Yoshinobu Kaneda

Renesas Electronics (Japan)

Papers

2

Total Citations

13

H-Index

2

About

Yoshinobu Kaneda is a leading figure in advanced non-volatile memory (NVM) design, with a primary focus on embedded flash technologies for high-end microcontroller units (MCUs). His major contributions center on the development of 40-nm embedded SG-MONOS (Split-Gate Metal-Oxide-Nitride-Oxide-Silicon) flash macros, which are critical for enabling the intelligence and performance required in AI-driven Internet of Things (IoT) endpoint devices. Kaneda’s most cited work introduces a novel charge-assisted offset cancellation sense amplifier, achieving a remarkable 200-MHz random read operation and a density of 7.91 Mb/mm²—a significant leap for high-performance, low-cost MCUs. This innovation directly addresses the demands of crossover applications in home automation, machine vision, and robotics, bridging the gap between high-end and low-end processing. With cumulative citations exceeding 13 for his top papers, Kaneda’s research has been recognized for its practical impact on smarter societies and factories, particularly in the context of 5G and AI integration. His work exemplifies how advanced circuit design can push the boundaries of embedded memory, making him a key contributor to next-generation endpoint computing.

Research Focus

Key Achievements

2
H-Index
2
Papers
13
Total Citations
7
Avg Citations/Paper
🏆 Most Cited Paper
A 40-nm Embedded SG-MONOS Flash Macro for High-End MCU Achieving 200-MHz Random Read Operation and 7.91-Mb/mm<sup>2</sup> Density With Charge-Assisted Offset Cancellation Sense Amplifier
10 citations · 2022
📈 Most Prolific Year: 2022 (1 Papers)
🤝 Key Collaborators: 15
🏛 Institutions: Renesas Electronics (Japan)

Top Papers

  1. 1
  2. 2

Key Collaborators

Contact & Links

Available for collaboration
Content generated · 15 days ago