Yasunobu Aoki

Renesas Electronics (Japan)

Papers

1

Total Citations

3

H-Index

1

About

Yasunobu Aoki is a leading figure in advanced embedded memory design, with his research centered on high-performance, high-density flash memory for next-generation microcontrollers (MCUs). His major contributions lie in the development of a 40nm embedded SG-MONOS (Split-Gate Metal-Oxide-Nitride-Oxide-Silicon) Flash macro, a critical enabler for endpoint devices powering smarter societies and factories. Aoki’s work directly addresses the demands of AI, IoT, and 5G applications—such as home automation, machine vision, and robotics—by achieving a groundbreaking 200MHz random read operation and an impressive density of 7.91 Mb/mm². A key innovation is his charge-assisted offset cancellation sense amplifier, which overcomes read margin challenges in scaled technologies. While his most-cited paper (2021) has garnered 3 citations, its impact is amplified by its role in a rapidly evolving field where performance-per-area is paramount. Aoki’s achievements demonstrate a rare blend of circuit ingenuity and system-level foresight, positioning him as a pivotal contributor to the hardware foundation of intelligent, connected devices.

Research Focus

Key Achievements

1
H-Index
1
Papers
3
Total Citations
3
Avg Citations/Paper
🏆 Most Cited Paper
A 40nm Embedded SG-MONOS Flash Macro for High-end MCU Achieving 200MHz Random Read Operation and 7.91Mb/mm2 Density with Charge Assisted Offset Cancellation Sense Amplifier
3 citations · 2021
📈 Most Prolific Year: 2021 (1 Papers)
🤝 Key Collaborators: 14
🏛 Institutions: Renesas Electronics (Japan)

Top Papers

  1. 1

Key Collaborators

Contact & Links

Available for collaboration
Content generated · 11 days ago