Yosuke Tashiro

Renesas Electronics (Japan)

Papers

2

Total Citations

13

H-Index

2

About

Yosuke Tashiro is a leading figure in embedded non-volatile memory (eNVM) design, with a focused expertise in split-gate MONOS (SG-MONOS) flash memory technology for high-end microcontrollers (MCUs). His major contributions center on overcoming the performance-density trade-off in embedded flash, enabling both high-speed random read operations and exceptional memory density. Tashiro’s most impactful work, published in 2022, demonstrates a 40-nm embedded SG-MONOS flash macro that achieves a groundbreaking 200-MHz random read operation alongside a density of 7.91 Mb/mm². This was made possible by his innovative charge-assisted offset cancellation sense amplifier, which significantly improves sensing margin and reliability. His research directly addresses the growing demands of AI-integrated IoT and edge computing, where endpoint devices require higher intelligence, speed, and energy efficiency. With over 10 citations on his flagship paper and additional contributions in 2021, Tashiro’s work is critical for advancing next-generation MCUs used in robotics, machine vision, and smart factory automation. His achievements represent a key enabler for the fusion of AI and 5G in smarter, more responsive embedded systems.

Research Focus

Key Achievements

2
H-Index
2
Papers
13
Total Citations
7
Avg Citations/Paper
🏆 Most Cited Paper
A 40-nm Embedded SG-MONOS Flash Macro for High-End MCU Achieving 200-MHz Random Read Operation and 7.91-Mb/mm<sup>2</sup> Density With Charge-Assisted Offset Cancellation Sense Amplifier
10 citations · 2022
📈 Most Prolific Year: 2022 (1 Papers)
🤝 Key Collaborators: 15
🏛 Institutions: Renesas Electronics (Japan)

Top Papers

  1. 1
  2. 2

Key Collaborators

Contact & Links

Available for collaboration
Content generated · 12 days ago