Jerry Zhao
Papers
2
Total Citations
6
H-Index
1
About
Jerry Zhao is a rising star in computer architecture, pioneering the design of specialized heterogeneous systems-on-chip (SoCs) for the demanding workloads of machine learning and robotics. His research focuses on creating efficient, domain-specific hardware accelerators that bridge the gap between general-purpose processors and custom ASICs. Zhao’s major contributions are embodied in two landmark chips fabricated in Intel 16nm technology. The first, NeCTAr, is a 16nm heterogeneous multicore RISC-V SoC that introduces a novel near-cache transformer accelerator, achieving 109 GOPS for matrix-vector multiplications at just 400MHz. This work directly addresses the memory-bound nature of sparse and dense ML kernels. His second chip, MAVERIC, is a compact 16mm² SoC integrating 4 cores with 13 INT8/FP32 accelerator units, delivering 72 FPS at a mere 10 mJ per frame for complex robotics pipelines like 3D reconstruction. Despite being early in his career, Zhao’s work has already garnered significant attention (5 citations for NeCTAr in 2024), establishing him as a leading voice in the next generation of energy-efficient, application-driven processor design.
Research Focus
Key Achievements
Top Papers
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- 2