Vighnesh Iyer

University of California, Berkeley

Papers

1

Total Citations

1

H-Index

1

About

Vighnesh Iyer is a leading researcher in energy-efficient heterogeneous systems-on-chip (SoCs) for robotics and machine learning. His major contributions center on architecting specialized hardware accelerators that deliver high-performance, low-power computation for real-time robotic perception and 3D reconstruction. Iyer’s most cited work, the MAVERIC SoC, is a landmark 16nm design integrating four cores with 13 INT8/FP32 accelerator units, achieving 72 FPS at just 10 mJ per frame. This chip demonstrates how tightly coupled, domain-specific accelerators can enable complex robotics applications—such as depth estimation and 3D reconstruction—on a power budget suitable for autonomous systems. With over 1 citation already, MAVERIC is gaining recognition as a blueprint for next-generation robotics processors. Iyer’s research bridges the gap between algorithm demands and hardware efficiency, making him a key figure in the push toward intelligent, untethered machines. His work is essential reading for students and engineers designing the future of edge AI and autonomous robotics.

Research Focus

Key Achievements

1
H-Index
1
Papers
1
Total Citations
1
Avg Citations/Paper
🏆 Most Cited Paper
MAVERIC: A 16nm 72 FPS, 10 mJ/Frame Heterogeneous Robotics SoC with 4 Cores and 13 INT8/FP32 Accelerators
1 citations · 2025
📈 Most Prolific Year: 2025 (1 Papers)
🤝 Key Collaborators: 7
🏛 Institutions: University of California, Berkeley

Top Papers

  1. 1

Key Collaborators

Contact & Links

Available for collaboration
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