Hardware-Efficient Velocity Estimation of Dynamic Obstacles Based on a Novel Radix-4 CORDIC and FPGA Implementation

摘要

Dynamic obstacles present a challenge for navigation of mobile robots. Estimation of the velocity of dynamic obstacles helps in collision avoidance. In this paper, we propose a hardware-efficient approach for velocity estimation that is appropriate for FPGA-driven mobile robots. The proposed approach is based on a novel approximate radix-4 CORDIC algorithm with low latency. The new CORDIC requires at most four iterations for convergence and has very low area requirement. Using the proposed CORDIC, we present an iterative method for velocity estimation. The velocity estimation scheme achieves roughly 87% reduction in slice-delay product compared to a direct algebraic approach (that uses multipliers). Experiments with an FPGA-based robot are reported.