FPGA Implementation of Closed-loop Control System for Small-sized RoboCup
Chirot Charitkhuan, Janjai Bhuripanyo, Rerngwut Choomuang
- 发表年份
- 2006
- 引用次数
- 4
摘要
In the small version of the RoboCup competition, some hardware designers utilize off-the-shelf controller such as: LM629 etc. to setup a PID control loop for each individual motor on the wheel. The drawback of such approach is the unbalanced synchronization of the controllers because the programmer has to send a series of command bytes to each controller individually one by one. This creates a time lag of at approximately 12+ muS for each controller setup. The time lag for such controllers varies depending on the number of controllers involved with the move. For a typical 4-wheels robot, such the time lag can vary up to 3 setup times lag (36+ muS) between the setup of the 1st to the setup of the 4th motor. The purpose of this paper is to use the proposed field programmable gate array (FPGA) implementation to eliminate such problem
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