Weisheng Jia

About

Weisheng Jia is a researcher at the forefront of efficient deep learning and hardware acceleration, specializing in real-time semantic segmentation and FPGA-based neural network design. His work addresses the critical challenge of deploying lightweight neural networks on resource-constrained hardware, enabling high-performance computer vision in edge and embedded systems. Jia’s most cited paper, “Design and Implementation of Real-time Semantic Segmentation Network Based on FPGA” (2021, 6 citations), introduces a novel hardware accelerator that balances network miniaturization with real-time processing demands, demonstrating practical solutions for autonomous driving and robotics. This contribution bridges the gap between algorithmic innovation and hardware efficiency, offering a scalable framework for low-latency inference. By integrating model compression techniques with FPGA optimization, Jia’s research advances the deployment of deep learning in real-world applications where power and speed are paramount. His work stands out for its hands-on approach to co-designing neural architectures and hardware platforms, making him a key figure in the growing field of efficient AI systems.

Research Focus

Key Achievements

Top Papers

1. 1
   Design and Implementation of Real-time Semantic Segmentation Network Based on FPGA

   6 citations · 2021

Key Collaborators

Contact & Links