Rajeev Jain

University of California, Los Angeles, University of California, Berkeley

Papers

Total Citations

122

H-Index

About

Rajeev Jain is a pioneer in electronic design automation (EDA), whose work has fundamentally shaped how algorithm-specific integrated circuits (ICs) are designed. His research centers on bridging the gap between high-level behavioral descriptions and physical silicon implementation, particularly for demanding applications in speech and image processing, telecommunications, and robotics. Jain’s most significant contribution is the development of the LAGER system, an integrated CAD framework that allows designers to specify chips at a behavioral level and automatically map them to optimized silicon structures. This work, detailed in his highly cited 1991 paper (96 citations), introduced a revolutionary approach by combining a behavioral mapper with a silicon assembler, enabling rapid design space exploration. By providing user interfaces at behavioral, structural, and physical levels, LAGER dramatically reduced the time and expertise needed to create custom digital signal processors. Jain’s vision of automated, algorithm-specific IC design laid critical groundwork for modern high-level synthesis tools, making him a foundational figure in the field of computer-aided design for VLSI systems.