Chee Wee Choo

About

Chee Wee Choo is a researcher whose work centers on the hardware acceleration of computer vision systems, with a particular focus on FPGA (Field-Programmable Gate Array) implementations. His primary research area involves the development of efficient, real-time image processing architectures for robotic and machine vision applications. Choo’s major contribution lies in the FPGA implementation of log-polar mapping, a spatially-variant image representation technique that mimics the human visual system. This approach offers significant advantages for active vision systems, including data compression, faster sampling rates, and enhanced processing speeds—critical for tracking tasks in robotics. His most cited paper, "FPGA Implementation of Log-polar Mapping" (2008), has garnered 8 citations, establishing a foundation for subsequent work in the field (including a 2010 follow-up). By translating complex computational models into practical, hardware-based solutions, Choo has demonstrated how FPGAs can overcome the limitations of software-based image processing, enabling faster and more efficient machine vision. His research is particularly notable for its direct impact on real-time robotic systems, where speed and resource efficiency are paramount.

Research Focus

Key Achievements

Top Papers

1. 1
   FPGA Implementation of Log-polar Mapping

   8 citations · 2008
2. 2
   FPGA implementation of log-polar mapping

   2 citations · 2010

Key Collaborators

Contact & Links