Zarrin Tasnim Sworna
Papers
1
Total Citations
3
H-Index
1
About
Zarrin Tasnim Sworna is a researcher whose work bridges computer arithmetic and optimization algorithms, with a particular focus on enhancing microprocessor efficiency. Her key research areas include digital circuit design, division algorithms, and heuristic optimization techniques. Her most notable contribution is the development of an FPGA-based divider circuit that leverages the simulated annealing algorithm—a novel approach that addresses the inherent slowness and complexity of division operations in microprocessors. By introducing a heuristic function to determine global and local optimum values, Sworna’s work offers a more efficient alternative to traditional division methods. While her most-cited paper has garnered 3 citations, its impact lies in its innovative integration of metaheuristic optimization with hardware design, opening new pathways for energy-efficient and high-speed computing. This achievement highlights her ability to apply computational intelligence to fundamental hardware challenges, making her work relevant for researchers in embedded systems and VLSI design. Sworna’s research exemplifies how interdisciplinary approaches can solve long-standing problems in computer architecture.
Research Focus
Key Achievements
Top Papers
- 1An FPGA-Based Divider Circuit Using Simulated Annealing Algorithm3 citations · 2018