K. Saranya

About

K. Saranya is a researcher whose work lies at the intersection of computer vision and hardware acceleration, with a particular focus on deploying deep learning models on resource-constrained platforms. Her most-cited paper, "Object recognition using FPGA and TINY YOLO" (2023), demonstrates a practical approach to real-time object detection by implementing the lightweight TINY YOLO algorithm on Field-Programmable Gate Arrays (FPGAs). This work addresses a critical challenge in embedded computer vision: achieving high-speed, low-power object recognition without relying on traditional GPUs. By bridging the gap between deep learning algorithms and reconfigurable hardware, Saranya’s research contributes to making AI more accessible for edge computing applications, such as autonomous systems and smart surveillance. With 4 citations to date, this paper has already garnered attention from researchers exploring efficient neural network deployment. Her work exemplifies the growing trend of optimizing computer vision models for specialized hardware, offering a blueprint for students and engineers interested in the intersection of deep learning and digital design.

Research Focus

Key Achievements

Top Papers

1. 1
   Object recognition using FPGA and TINY YOLO

   4 citations · 2023

Key Collaborators

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