J. Alarcon

About

J. Alarcon is a researcher whose work sits at the intersection of reconfigurable computing and neural network hardware, with a primary focus on embedded vision systems. Their key contributions center on the development of specialized Tiny Neural Networks (TNNs) for real-time image recognition, implemented on Field-Programmable Gate Arrays (FPGAs). Alarcon’s most cited work, "Reconfigurable Hardware Architecture of a Shape Recognition System Based on Specialized Tiny Neural Networks With Online Training" (2009, 31 citations), introduces a novel hardware architecture that leverages the inherent parallelism and reconfigurability of FPGAs to create compact, efficient neural networks capable of online training. This work is complemented by an earlier study (2008, 9 citations) that further explores FPGA-based implementation for image recognition, emphasizing system expandability through modular "Basic Units." Alarcon’s research is notable for its practical approach to overcoming the computational bottlenecks of software-based neural networks, making it highly relevant for applications in security, robotics, and automated surveillance where low latency and low power consumption are critical. By demonstrating that powerful pattern recognition can be achieved with resource-constrained hardware, Alarcon has made a significant impact on the field of embedded artificial intelligence.

Research Focus

Key Achievements

Top Papers

1. 1
   Reconfigurable Hardware Architecture of a Shape Recognition System Based on Specialized Tiny Neural Networks With Online Training

   31 citations · 2009
2. 2
   FPGA implementation of an image recognition system based on Tiny Neural networks and on-line reconfiguration

   9 citations · 2008

Key Collaborators

Contact & Links