Tsutomu Sasao

About

Tsutomu Sasao is a leading figure in logic synthesis, computer arithmetic, and reconfigurable computing, with a career spanning decades of foundational work in switching theory and digital system design. His major contributions include pioneering techniques for function decomposition, particularly using decision diagrams and exclusive-OR logic, which have become essential in low-power VLSI design. He is also renowned for advancing residue number system (RNS) arithmetic, notably through his 2018 work on a high-speed, low-power deep neural network on FPGA using nested RNS for object detection—a paper with 33 citations that demonstrates practical, energy-efficient AI acceleration. Sasao’s impact is reflected in his extensive citation record, with many of his papers on logic minimization and arithmetic circuits serving as key references in the field. He has authored several influential books, including *Switching Theory for Logic Synthesis*, and received the IEEE Computer Society’s Golden Core Award. His research continues to inspire engineers and students working at the intersection of hardware design and machine learning.

Research Focus

Key Achievements

Top Papers

1. 1
   A High-speed Low-power Deep Neural Network on an FPGA based on the Nested RNS: Applied to an Object Detector

   33 citations · 2018

Key Collaborators

Contact & Links