Heterogeneous neuromorphic processor based on RISC-V architecture for real-time robotics tasks

Abstract

The article discusses a heterogeneous processor based on an open source 64-bit core of the RISC-V architecture, combined with a reconfigurable neural network accelerator. The features of the implementation of a binary matrix neural network on FPGA and its combination with the RISC-V RV64GC core in tasks of cognitive robotics and industrial production are investigated in order to increase safety in the interaction of a robot and a person.