Parallel VLSI Architectures for Real-Time Control of Redundant Robots

Abstract

We present new architectures for the efficient computation of redundant manipulator inverse kinematics. A key component of our architecture is the calculation in VLSI hardware of the Singular Value Decomposition of the manipulator Jacobian. By calculating the core of the problem in hardware, we can make full use of the redundancy by implementing more complex self-motion algorithms. Application-specific (subtask dependent) portions of the inverse kinematics are handled in parallel by an array of programmable Digital Signal Processing chips, which interface with the custom hardware and the host machine. Whole our application utilizes the range of Texas Instruments TMS series DSP chips applied to our 8 degree of freedom arm, the architecture and algorithm development is valid for general redundant manipulators and a wide range of processors currently available and under development commercially.