A 40nm Embedded SG-MONOS Flash Macro for High-end MCU Achieving 200MHz Random Read Operation and 7.91Mb/mm2 Density with Charge Assisted Offset Cancellation Sense Amplifier
Masaya Nakano, Yoshinobu Kaneda, Koichi Takeda, Takahiro Shimoi, Yasunobu Aoki, Satoru Nakanishi, Yosuke Tashiro, Yasuhiko Taito, Ken Matsubara, Munekatsu Nakagawa, Tomoya Ogawa, Takashi Kurafuji, Hidenori Mitani, Takashi Ito, Takashi Kono
- 发表年份
- 2021
- 引用次数
- 3
摘要
The fusion of AI and IoT technologies in conjunction with 5G mobile communication is strongly driving the realization of smarter societies and factories. In particular, endpoint devices for home automation, machine vision, robotics, etc. need higher performance and higher intelligence. That is why some of these devices are moving to so-called “crossover area”, which is located at the boundary between high-end MCU area and low-end MPU area. In this area, it is essential to achieve both high performance and low cost as shown in Fig. 1. Users familiar with conventional MCUs prefer to continue the approach with MCUs from the viewpoints of reusability of existing software assets, real-time operations and BOM costs (no need of external Flash memories). To meet their expectations for performance and cost, embedded Flash memory (eFlash), one of the key components in an MCU, should achieve high-speed random read operation corresponding to CPU operations at higher frequency (600MHz-1GHz) while reducing its macro size which occupies a significant part of MCU die size.
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