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About

Masanori Hariyama is a researcher whose work spans the intersection of hardware architecture, robotics, and computer vision, with a particular focus on designing specialized processors and accelerators for computationally intensive tasks. His research has consistently addressed the challenge of bridging algorithmic complexity with practical hardware implementation, producing VLSI and FPGA-based solutions for real-world robotic and imaging applications. Among his most notable contributions is his early work on a CAM-based collision detection VLSI processor for robotics, which remains his most cited publication with 9 citations, reflecting its foundational relevance to robot motion planning hardware. He further advanced 3D object representation through a compact rectangular solid approach implemented in VLSI, enabling efficient motion planning for intelligent robots. His path planning research, grounded in distance transformation, complemented these efforts by offering fast, collision-free navigation solutions with hardware-aware design. More recently, Hariyama has embraced modern reconfigurable computing, developing OpenCL-based FPGA accelerators for both PatchMatch multi-view stereo and particle filtering — techniques critical to visual tracking and robot localization. These contributions demonstrate a sustained commitment to accelerating vision and estimation algorithms through programmable hardware, making his body of work a valuable reference for researchers working at the frontier of embedded robotics and hardware-accelerated computer vision.