Erich C. Whitney

About

Erich C. Whitney is a pioneering figure in the hardware implementation of neural networks, with foundational contributions to the design of high-speed associative memory systems. His most cited work, "Design and Implementation of a High Speed CMAC Neural Network Using Programmable CMOS Logic Cell Arrays" (1990), introduced a dedicated CMOS logic architecture for the Cerebellar Model Articulation Controller (CMAC) network—a key advancement in real-time adaptive control. Whitney’s innovation enabled the creation of two general-purpose CMAC associative memory boards for the VME bus, each supporting up to eight independent networks with a total of one million adjustable weights. This work, cited 11 times, demonstrated how programmable logic could dramatically accelerate neural computation, bridging the gap between theoretical models and practical, high-speed hardware. Whitney’s research lies at the intersection of neural networks, VLSI design, and embedded systems, and his early adoption of CMOS logic cell arrays anticipated later trends in reconfigurable computing. For students and researchers, his work remains a landmark in the efficient physical realization of learning algorithms, showcasing how hardware-software co-design can unlock the potential of neural architectures for real-world applications.

Research Focus

Key Achievements

Top Papers

1. 1
   Design and Implementation of a High Speed CMAC Neural Network Using Programmable CMOS Logic Cell Arrays

   11 citations · 1990

Key Collaborators

Contact & Links