A survey of dynamically and partially reconfigurable FPGA-based self-evolvable hardware

Abstract

The objective of evolvable hardware(EHW) research is the development of automated electronic-circuit design,or a system capable of adaptive alterations to the hardware of its structure.EHW has a great variety of applications in fields such as design automation,controllers for autonomous mobile robots,and wireless sensor network nodes.Self-evolutionary hardware completes genetic operations and the evaluation of fitness in an on-chip microprocessor.The on-chip microprocessor core of the dynamically and partially reconfigurable field-programmable gate array(FPGA) runs the genetic algorithm,simulates the evolving process to search for possible circuits,and then sets the on-chip reconfigurable logic so that it runs designs which are superior to the original man-made ones,or are optimal designs.In this way adaptive hardware is possible.When a circuit fails,the self-evolutionary hardware can automatically search for new configurations,using the abundant resources on the chip to replace the failed area,realizing the goal of self-repairing hardware.In this paper,the ideas behind self-EHW research,the architecture of self-EHW and the latest progress in the area are studied.The primary problems to be solved are then summarized.Finally,future research directions are pointed out,such as ways to establish a highly efficient mapping mode between chromosomal encoding of circuits and the configuration bit strings of reconfigurable logic.