Multiresolutional Filter Application for Spatial Information Fusion in Robot Navigation

Abstract

To alleviate these problems, the fixed sphere decoding (FSD) algorithm was recently proposed (Barbero & Thompson, 2006 b). The FSD algorithm achieves a fixed throughput performance and enables fully-pipelined hardware by performing fixed number of operations per detected symbol, independent of the noise level. The FSD algorithm is performed in two stages where the first one is a pre-processing stage for the received www.intechopen.com MIMO Systems, Theory and Applications 440 symbols that incorporates a QR decomposition of the channel matrix for the MIMO system. This pre-processing allows for employing a tree-based search algorithm at the second stage that finds the optimal symbol which has the minimum distance to the received symbol. In this chapter, we present an efficient FPGA prototype of the FSD that implements an efficient QR decomposition of the channel matrix for a MIMO system using CORDIC array techniques followed by the FSD tree-based search algorithm. This prototype provides an improved hardware implementation in terms of area and throughput compared to up-todate published results in the literature. The FPGA implementation is incorporated with a MATLAB simulation model of an OFDM based MIMO system to validate the hardware design. As a practical application, we employed the FSD in the receiver of the IEEE802.16e WiMAX MIMO system. The IEEE 802.16e standard supports three types of MIMO space time codes (STC), referred to as matrix A, B, and C. These STC codes achieve different levels of throughput and diversity depending on the quality of the MIMO channels. We employed the FSD as a STC detector to decode the different STC schemes. In achieving that, the received signal is adaptively pre-processed according to the STC type prior feeding it to the FSD. At the end of the chapter, we present the performance of a two by two STC-WiMAX system with the FSD in terms of bit error rate and throughput. The results indicate that our FPGA implementation achieves throughput values that satisfy the requirements of the WiMAX standard.