Hardware Accelerated Inverse Kinematics for Low Power Surgical Manipulators

Abstract

Robotic minimally invasive surgery (MIS) is performed via small incisions and so lessens wound healing time, associated pain and risk of infection. We refactor the control pipeline and accelerate the most time-consuming stage-inverse kinematics (IK) calculation for robot assisted MIS. Field programmable gate array (FPGA) technology is used to develop a low power hardware IK accelerator. The set of optimization techniques reduces the design's size so it can fit onto the real hardware. Accelerator executes IK in approximately 30 microseconds. System architecture runs on a heterogeneous CPU-FPGA platform. Single and multi-point architectures are developed, where multi-point architecture overcomes communication overhead between platforms and allows achieving a higher output rate. Implementation is tested for 16, 24 and 32-bit fixed-point numbers, with an average computation error of 0.07 millimeters for 32-bit architecture. Experimental results validate and verify the proposed solution.