A new area-efficient reconfigurable encoder architecture for flexible error detection and correction in dependable communication systems

Abstract

Communication technologies are key and standard parts of most of today's integrated as well as field systems. Such technologies have experienced an explosive development during the last decades. More recently, short-distance communication systems have also been discussed as a way to connect embedded electronic systems in industrial applications. As industrial robots are assumed to be real-time and safety-critical in combination, test- and error correction technologies have to meet new challenges. However, many existing technologies for error correction are not able to manage multiple faults, are too slow in terms of encoding and decoding to satisfy industrial timing constraints. This paper introduces our PENCA architecture as a new concept of dependable fully configurable system, which promises a combination of reasonable overhead and relatively fast encoding, and ensuring high level of dependability, while keeping important flexibility, programmability and testability. Implementation results on Xilinx and Altera FPGA technologies are presented as well.