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Advanced Packaging Metrology And Lithography That Overcomes FOWLP/FOPLP Die Placement Error

Keith Best, Mike Marshall

Year
2018
Citations
5

Abstract

As the semiconductor roadmap continues to drive the cost of front-end manufacturing higher in the quest for ever-increasing functionality, manufacturers are looking to the back-end to provide a low cost solution for the final devices. One such solution employs the use of embedded wafer level ball grid array (eWLB), which provides a robust packaging platform supporting very dense, multi-layer interconnection of multiple die at low-profile, low-warpage and high yield. This process requires the substrate to be reconstituted using a mold compound that provides more space between die than the original wafer to fabricate additional I/O connections. The individual die are placed by a robot, where the placement/reconstitution process introduces significant die placement errors that must be accounted for in the photolithography process to ensure accurate overlay registration between the multiple layers that constitute the connection structures. The errors can be measured on the exposure tool, but this significantly impacts throughput as the measurement process for each die may take more time than the exposure itself.In this paper we demonstrate how an external metrology system can be used to determine the displacement of each die (i.e. X, Y and rotation) from the nominal position and how this metrology data is converted into a stepper correction file. This file provides the stepper with site by site corrections, so every exposure can be optimized. The paper also demonstrates how eliminating the measurement time in the stepper significantly increases stepper throughput.

Keywords

StepperDie (integrated circuit)MetrologyLithographyPhotolithographyOverlayThroughputWaferOptical proximity correctionProcess (computing)

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