Home /Research /Run-Time-Reconfigurable Multi-Precision Floating-Point Matrix Multiplier Intellectual Property Core on FPGA
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Run-Time-Reconfigurable Multi-Precision Floating-Point Matrix Multiplier Intellectual Property Core on FPGA

Year
2016
Citations
5

Keywords

Multiplier (economics)Field-programmable gate arrayMatrix multiplicationMultiplication algorithmMultiplication (music)AdderDigital signal processingBinary number

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