Nariankadu D. Hemkumar
Papers
1
Total Citations
4
H-Index
1
About
Nariankadu D. Hemkumar is a pioneering figure in VLSI architecture design, with a primary focus on developing efficient hardware implementations for computationally intensive matrix factorizations. His seminal work, particularly his 1995 thesis on "Efficient VLSI architectures for matrix factorizations," introduced novel CORDIC-based approaches for computing the Singular Value Decomposition (SVD)—a critical operation in real-time signal processing, robotics, and engineering applications involving complex data matrices. By advocating for CORDIC arithmetic, Hemkumar demonstrated how to achieve high-throughput, area-efficient designs that circumvent the need for traditional multipliers, making real-time SVD feasible on chip. Though his most-cited paper has accumulated 4 citations, its influence extends through the hardware acceleration community, where his architectural insights have informed subsequent work on embedded and low-power matrix computation. Hemkumar’s contributions are particularly notable for bridging the gap between linear algebra theory and practical VLSI implementation, offering a blueprint for deploying advanced matrix factorizations in resource-constrained, real-time systems. His research remains a touchstone for engineers seeking to integrate complex numerical algorithms into silicon.
Research Focus
Key Achievements
Top Papers
- 1Efficient VLSI architectures for matrix factorizations4 citations · 1995