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SoC-level fault injection methodology in SystemC design platform

Yung‐Yuan Chen, Yi-Chiang Wang

发表年份
2008
引用次数
7

摘要

Intelligent systems, such as intelligent car driving system or intelligent robot, require a stringent reliability while the systems are in operation. As system-on-chip (SoC) becomes prevalent in the intelligent system applications, the reliability issue of SoC is getting more attention in the design industry while the SoC fabrication enters the very deep submicron technology. In this study, we present a new approach of system bus fault injection in SystemC design platform, which can be used to assist us in performing the failure mode and effects analysis (FMEA) procedure during the SoC design phase. We demonstrate the feasibility of the proposed fault injection mechanism with an experimental ARM-based system.

关键词

SystemCEmbedded systemFault injectionReliability (semiconductor)Computer scienceSystem on a chipFault (geology)Failure mode and effects analysisReliability engineeringEngineering

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